1. Field of the Invention
The invention relates to a processor for processing data on the basis of instructions obtained from a program memory to which is connected a program counter for providing read address codes, this processor being provided, for the purpose of performing a part of a program stated in a loop control instruction comprising the execution N times of a looped sequence of "i" instructions, with a loop circuit comprising a loop counter to count the number of executions and to deliver a signal indicating the end of a part of the program so as to pass on to the remainder of the program.
After the last instruction in the looped sequence the processor automatically chooses whether to execute the following instructions or to start the performance of a new looped sequence. This mechanism permits the rapid execution of program loops.
2. Description of the Prior Art
A loop control instruction is described in IBM Technical Disclosure Bulletin, Volume 14, No. 9, February 1972, p. 2806. This instruction is difficult to use for pipelining. Pipeline calculations are extremely critical; inter alia, the arguments and results have to be presented and read in accord with a very narrow configuration. It is consequently impossible to initialize certain argument registers, to execute a loop control instruction and to execute a looped sequence N times. In particular, these "synchronization problems" limit the application of loop instructions.
The invention aims to provide a loop instruction processor making it possible to use pipeline calculations in a program loop sequence.